CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY (A)
  • E1-E2-E3-CPLD and FPGA Architectures-(PE-III)-VI-2020-21
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  • Course data
    General
    Unit-III Virtex -II PPT
    Unit-III Virtex-II datasheet pdf
    U-III Spartan-II ppt
    Spartan -II datasheet pdf
    Actel FPGA Data sheet
    Altera FLEX-10K FPGA PPT and Data sheet
    Altera FLEX-10K FPGA Data Sheet
    SLIP TEST
    Placement
    Placement and Routing
    Slip Test-1
    Assignment-2
    Online Class Videos
    08-02-2021 11:30 to 12:30PM Introduction to CPLD and FPGA
    09-02-2021 1:10 to 2:10PM Logic function Multiplexer Implementations
    12-02-2021 11:30 to 12:30PM PLDs Introduction
    15-02-2021 1:10 to 2:10PM PROM Architecture
    15-02-2021 11:30 to 12:30PM PAL Architecture-Logic Implementation
    22-02-2021 11:30 to 12:30PM PAL and PLA Architectures
    22-02-2021 1:10 to 2:10PM PROM-Pal-PLA copmarision
    01-03-2021 11-30 to 12-30PM CPLD introduction
    02-03-2021 1-10 t0 2-10PM CPLD-FPGA Design flow
    08-03-2021 11-30 to 12-30 PM Altera-Max-7000-Architecture
    08-03-2021 1-20 to 2-20PM Max-7000-Interconnect matrix-I/O block
    15-03-2021 11-30 to 12-30PM AMD Mach4-Architecture
    26-03-2021 11.30 to 12.30 Xilinx-XC-9500 Logic block,I/O block
    06-04-2021 1:10 to 2;10PM FPGA classification --XC4000 architecture
    09-04-2021 11:30 to 12:30PM XC-4000 and Spartan -II Architectures
    16-04-2021 11:30 to 12:30 Spartan-II Architecture
    23-04-2021 11:30 to 12:30 Virtex-II FPGA Architecture
    26-04-2021 11.30 to 12.30 Actel FPGA-Act1 logic module
    27-04-2021 1.10 to 2.10 Act-2 FPGA
    30-04-2021 11.30 to 12.30 Act-2,Act-3 and Altera FLEX-10K FPGA
    03-05-2021 11.30 to 12.30 Altera Flex-10K EAB and LAB
    04-05-2021 1.10 to 2.10 FPGA Design flow
    AY2021-UG-SEM-6-ECE-1,2,3-18ECE11CPLD&FPGA-AKK-20210507-27-ASIC-Semi custom and Full custom
    AY2021-UG-SEM-6-Ele-3-ECE1,2,3-18ECE11-CPLD and FPGA-AKK-20210511-28-Placement and Routing
    AY2021-UG-SEM-6-Ele-3-E1,E2,E3-18ECE11-CPLD &FPGA-AKK-20210517-Revision
    AY2021-UG-SEM-6-18ECE11-CPLD & FPGA-AKK-20210518-31-Revision2
    AY2021-UG-SEM-6-18ECE11-CPLD FPGA-AKK-20210521-32-Revision3
    AY2021-UG-SEM-4-Ele-3-18ECE11-CPLD FPGA-AKK-20210524-32-Assignment -2 writing
    AY2021-UG-SEM-4-Ele-3-18ECE11-CPLD FPGA-AKK-20210528-33-Revision
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    E1-E2-E3-CPLD and FPGA Architectures-(PE-III)-VI-2020-21
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    1. Home
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    3. Electronics and Communications Engineering
    4. UG
    5. Academic Year 2020-21
    6. VI Semester
    7. E1-E2-E3-CPLD and FPGA Architectures-(PE-III)-VI-2020-21
    8. Summary

    E1-E2-E3-CPLD and FPGA Architectures-(PE-III)-VI-2020-21

    • Teacher: Sri A.Krishna Kumar Assistant Professor
    Skill Level: Beginner

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