CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY (A)
  • E2-Digital Systems Design Lab-IV-2020-21
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    General
    DSD lab Batch 2- Assessment-1 -23 April 21
    DSD Lab-Assessment-1-Batch3-27April2021
    DSD Lab Assessment-1-Batch1-29April21
    Lab 1
    12-02-2021 9.10am to 11.20 am Introduction Verilog and practice on tool
    18-03-2021 9.10am to 11.20am ADDERS-Half Adder -Full Adder
    18-03-2021 11.45am to 1.00pm Binary Adder-Subtractors-HS-FS-MUX
    25-03-2021 9.10am to 11.20am Multiplexers and Demultiplexres
    06-04-2021 9.10am to 11.20am Practice of Xilinx simulator by the students and their assessment
    30-03-2021 2.20 pm to 4.30pm Practice session
    09-04-2021 9.10am to 11.30am Decoders and verification of records
    16 April 9.10am to 11.20 am Boolean function implementation using Decoder and MUX
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210423 -09-Assessment-1-Batch-2
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210429-10-Assessment-1 Batch-1
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210427-11-Assessment-1 Batch 3
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210430-12- Behavioral Modeling B2
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210504- 13-Behavioral modeling- B3
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210506-14-Behavioral modeling B1
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210507-15-Conditional Statements, demo on ALU, FF and Counter program execution
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210511-16-Conditional statements and demo on JK FF
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210513-17-Conditional statements, timing control, demo on FF, Counter, ALU using conditional statements-B3
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210520-20-Record checking and doubts clarification-B1
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210521-21-Timing control, sequential &parallele blocks, record checking-B2
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-22- Viva exam-B3
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LAB-NAM-20210527-23-Viva exam-B1
    AY2021-UG-SEM-4-ECE2-18EC C14-DSD LB-NAM-20210528-24-Viva Exam-B2
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    E2-Digital Systems Design Lab-IV-2020-21
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    Course info

    1. Home
    2. Courses
    3. Electronics and Communications Engineering
    4. UG
    5. Academic Year 2020-21
    6. IV Semester
    7. E2-Digital Systems Design Lab-IV-2020-21
    8. Summary

    E2-Digital Systems Design Lab-IV-2020-21

    • Teacher: Dr.N.Alivelu Manga Associate Professor
    Skill Level: Beginner

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