CHAITANYA BHARATHI INSTITUTE OF TECHNOLOGY (A)
VLSI Design-ECE-E1-AY-2020-21
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UNIT-I
L1.Introduction to Verilog
L2.Verilog Data type representation
L3.Verilog Structres and Hierachy
L4.Verilog Operators
MSVD1-Introduction to Verilog and Tasks and Functions
L5.Verilog Assignments and control statements
L6.Tasks and Functions, UDP
L7: UDP and Switch level modeling
L8: Switch Level Modeling and mealy, moore FSM
L9: Logic Synthesis, Synthesis Design flow, Gate level Netlist
Unit-I part2
UNIT-II:Introduction to MOS Technology
L10: Unit-II: Introduction to MOS Technology
L11: Basic MOS Transistor action: Enhancement and Depletion Modes
L12:MOS Id derivation and electrical characteristics
Unit-II Part1
L13:PMOS electrical characteristics, Threshold voltage and Body Effect.
Unit-II Part 2
L14: Summary of MOS operation and characteristics
L15: Problem solving and MOS fabrication
L17:MOS layers and Stick diagrams
L18: Stick diagrams with examples
L19: Stick diagrams and Design rules
L20:Design rules and layouts
Unit-III: IC Fabrication
L21:Unit-III:Introduction and overview of IC Fabrication
L22: Crystal growth and wafer preparation
L23: wafer preparation-shaping, slicing and polishing
Unit-III
L24: Oxidation and Chemical vapour deposition
L25: epitaxial growth- reactors &Diffusion, Ion implantation
L26: Photolithography, e beam and x-ray lithography
L27: Metallization and Packaging Virtual Lab Session-1
Unit-IV
L28: Unit-IV: MOS inverters with different loads andVirtual Lab Session-2
L29: Unit-IV: MOS inverters with different loads andVirtual Lab Session-3
L30::MOS inverters with different loads
L31:CMOS: Inverter, NAND, NOR, AOI,OAI gates & VLS-4
L32: Transmission gate logic circuits and BiCMOS inverter & VLS-5
Unit-IV
VLSi Design Text book- cmos digital integrated circuits_sung-mo kang-yusuf
Unit-V
Unit-V
L33: Semiconductor memory types and its characteristics
L34: SRAM and DRAM operation
VLSID ST1 and ST2 grades
L35: VLS of EDA-7
L36: NAND and NOR based memories and PLA programming
L37:Testing, Fault models, Controllability, Observability.
L38: VLS of EDA-8
L39: Slip Test 3
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VLSI Design-ECE-E1-AY-2020-21
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Electronics and Communications Engineering
UG
Academic Year 2020-21
VII Semester
VLSI Design-ECE-E1-AY-2020-21
Summary
VLSI Design-ECE-E1-AY-2020-21
Teacher:
Sri N.Jagan Mohan Reddy Assistant Professor
Skill Level
:
Beginner